Embedded Systems · PCB Design · Nanotechnology

Gururaghuraman
Sethuraman

I'm a  |

2× IEEE Published Researcher • Erasmus Scholar @ Grenoble-INP Phelma • Ex-Robert Bosch • B.Tech EEE, Amrita Vishwa Vidyapeetham

About Me

Gururaghuraman Sethuraman

I am a published Embedded Systems & Electrical Engineer with a B.Tech in Electrical & Electronics Engineering from Amrita Vishwa Vidyapeetham and an Erasmus Exchange Scholarship in Nanotechnology at Grenoble-INP Phelma, France — one of Europe's leading engineering institutes for semiconductor science and microsystems.

I have authored 2 peer-reviewed IEEE publications on demagnetization fault detection in Interior Permanent Magnet Synchronous Motors (IPMSM), fusing Finite Element Analysis with Machine Learning — directly applicable to next-generation EV drivetrains. My industrial track record spans Robert Bosch (Embedded C firmware & CAN validation on live HV testbeds), Schneider Electric, and Igarashi Motors.

I am actively targeting roles in Embedded Systems, Motor Control, Automotive Electronics, and EV Powertrain Engineering where rigorous engineering, research depth, and hands-on execution converge.

IEEE Publications
5+ Industry Roles
Grenoble Erasmus Scholar

Professional Experience

Current

Database Architect & Python Developer

AInsurCo  ·  Remote — London, UK

Aug 2025 – Present

  • Architected and maintained 10+ relational database schemas supporting core insurance data operations, applying advanced normalisation, indexing, and constraint strategies for production-grade reliability.
  • Authored and optimised 30+ SQL queries and stored procedures for reporting, validation, and data-retrieval pipelines across the platform.
  • Resolved 15+ data-integrity and schema-consistency issues through constraint enforcement and automated validation, significantly reducing downstream data errors.
  • Engineered 5+ Python batch automation scripts for scheduled data-processing tasks, reducing manual intervention and improving pipeline throughput.
SQLPythonDatabase ArchitectureSchema DesignStored Procedures
Robert Bosch

Embedded Hardware Intern

Robert Bosch Limited  ·  Bangalore, India

June 2024 – July 2024

  • Developed and validated 5+ Embedded C firmware modules implementing CAN communication layers for EV benchmarking infrastructure and Vehicle Control Unit (VCU) interfaces.
  • Analysed 100+ CAN frames using CANalyzer — performing DLC verification, error-state capture, and fault-injection analysis across 3+ live High-Voltage (HV) testbeds.
  • Contributed to technical evaluation of E-axle architecture across 2 HV subsystem configurations, documenting integration behaviour per internal test protocols.
Embedded CCAN BusCANalyzerHV TestbedVCUE-Axle

Supply Chain Intern — Electronics Division

Schneider Electric  ·  Chennai, India

July 2023

  • Validated 150+ PCB components across power-electronics manufacturing lines against design specifications, identifying and flagging non-conformances.
  • Analysed component lifecycle and supply dependencies for 8+ critical converter subsystems, supporting procurement risk assessment and mitigation planning.
PCB InspectionPower ElectronicsSupply ChainComponent Validation

Manufacturing & Quality Intern

Igarashi Motor Pvt Ltd  ·  Chennai, India

Feb. 2023

  • Audited motor assembly workflows across 3+ production stations, identifying redundant checkpoints and contributing to an estimated 10–15% reduction in inspection cycle time.
  • Reviewed and improved BOM accuracy for 20+ line items, strengthening defect-traceability documentation for small-motor production.
Motor AssemblyBOMQuality AuditDefect Traceability

Quality Intern — Electronics Assembly

Sri Balaji Assembles & Plastics India Pvt Ltd  ·  Chennai, India

July 2022 – Aug. 2022

  • Supported IPC/ISO-compliant quality control checks across 50+ electronic sub-assembly units.
  • Collaborated with production teams to isolate component-level defects across 10+ assembly batches, reducing rework cycles and improving first-pass yield.
IPC StandardsISO QCElectronics AssemblyDefect Analysis

Education

Erasmus Scholarship

Exchange Programme — Nanotechnology

Grenoble-INP Phelma  ·  Grenoble, France

Jan. 2025 – June 2025

Selected for the prestigious Erasmus Exchange Scholarship at one of Europe's foremost institutions for semiconductor science and microsystems engineering. Immersed in cutting-edge nanofabrication research with access to state-of-the-art cleanroom facilities at PTA (Plateforme Technologique Amont).

Advanced CMOSMicrosystemsAdvanced VLSI SpintronicsSemiconductor PhysicsNanoelectronics

Bachelor of Technology — Electrical & Electronics Engineering

Amrita Vishwa Vidyapeetham  ·  Coimbatore, India

Apr. 2021 – May 2025

Comprehensive B.Tech programme with specialisation tracks in embedded systems, power electronics, and electric drives. Produced 2 IEEE-published research papers during the degree — a distinction held by a very small proportion of undergraduates globally.

Embedded SystemsMicroprocessors & MicrocontrollersPower Electronics Control SystemsElectric DrivesSimulation & Modelling

IEEE Publications

Peer-reviewed research combining Finite Element Analysis with Machine Learning for EV motor fault diagnostics.

IEEE CONECCT

Demagnetization in V-shaped IPMSM: A Fusion of Finite Element Analysis and Machine Learning

Presents a novel hybrid diagnostic framework combining high-fidelity FEM simulation with supervised ML models for early-stage detection of permanent-magnet demagnetization in V-shaped IPMSM configurations critical to modern electric vehicle drivetrains.

June 2025 IEEE CONECCT 2025
ICPERS

Machine Learning-based Analysis on Non-uniform Demagnetization Fault in IPMSM Using FEM

Investigates non-uniform demagnetization fault patterns in IPMSM using FEM-generated datasets, applying machine learning classifiers to achieve robust fault-severity discrimination — enabling predictive maintenance capabilities for EV powertrain systems.

May 2025 ICPERS 2025

Tech Skills

Languages

CEmbedded CVerilog HDL PythonSQL

MCUs & Platforms

STM32dsPICESP32 ArduinoRaspberry Pi 4

Protocols

CAN BusUARTSPII2C

Automotive & EV

CANalyzerCANoeEV Benchmarking VCU InterfaceHV TestbedE-Axle

Motor Control & Power

IPMSM DiagnosticsMotor ControlInverter Subsystems HV ArchitecturePower Electronics

EDA & Simulation

MATLAB/SimulinkANSYS Motor-CADVivado MultisimETAPAutoCAD KiCad 9LTspice

PCB & Hardware Design

PCB DesignPCB LayoutSchematic Capture PCB RoutingCircuit DesignAnalog Circuit Design Component SelectionGround Plane Design Design Rule Check (DRC)Electrical Rule Check (ERC) Gerber GenerationBill of Materials (BOM) Manufacturing DocumentationHardware Documentation

Database & Data Systems

Relational DB DesignSchema Architecture Query OptimisationBatch ProcessingData Integrity

Dev Tools

GitDockerCI/CDMPLAB X

Languages Spoken

EnglishC1 · IELTS 7.0
TamilC2 · Native
TeluguC2 · Native
DeutschA1 · Goethe

Projects

Li-Ion Battery Protection PCB

Designed and developed a manufacturing-ready 2-layer PCB for a single-cell Li-Ion battery featuring reverse-current protection via Schottky diode, 500 mA resettable polyfuse, battery voltage monitoring via 100kΩ/100kΩ voltage divider for ADC output, and copper ground pour. DRC passed with zero errors. Full Gerber, BOM, and LTspice simulation included.

KiCad 9LTspicePCB DesignPower ElectronicsHardware

IPMSM Demagnetization Fault Prediction via ML

Trained and evaluated ML models across 10+ fault-severity classes using FEM-simulated datasets (ANSYS Motor-CAD) for early-stage detection of permanent-magnet demagnetization in EV-class IPMSM units, enabling predictive fault-monitoring for electric drivetrains.

ANSYS Motor-CADPythonMachine LearningFEA

SOH Prediction for LiFePO₄ Batteries via ML

Built a regression pipeline trained on battery cycling data across 50+ charge/discharge cycles on Raspberry Pi 4, predicting State of Health (SOH) to provide lifecycle decision support for EV battery management systems.

Raspberry Pi 4PythonML RegressionBMS

32-bit RISC Processor Subsystem Study

Designed and implemented 3 core subsystems (ALU, data memory, register file) in Verilog HDL on Vivado, synthesised and validated across multiple FPGA configurations for timing and resource-utilisation benchmarking.

Verilog HDLVivadoFPGARISC Architecture

MTJ-based Stochastic Random Number Generator

Developed and tested a stochastic solver for Magnetic Tunnel Junction (MTJ)-based random number generation across 25+ simulation trials, targeting low-power spintronic embedded applications.

PythonSpintronicsMTJStochastic Modelling

Get In Touch

I am actively seeking roles in Embedded Systems, Motor Control, Automotive Electronics, and EV Powertrain Engineering. Open to full-time, contract, and research opportunities globally. I typically respond within 24 hours.